MLCC Capacitance Change & Effect on a SET |
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MLCC Capacitance Change & Effect on a SET
[1] Capacitance change
[2] Effect on a SET
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1. Capacitance change, MLCC characterisitcs
Capacitance is influenced by the conditions shown below (1~4)
[MLCC Internal structure]
MLCC characteristics - Tolerance / Effect - Capacitance change
MLCC characteristics - Temperature Coefficient(TCC) / Effect - Capacitance change
MLCC characteristics - Aging / Effect - Capacitance reduction
MLCC characteristics - DC-Bias, AC Voltage / Effect - Capacitance change
MLCC characteristics - Rated Voltage / Effect - Maximum applicable voltage
MLCC characteristics - Breakdown Voltage (BDV) / Effect - Insulation breakdown Voltage
MLCC characteristics - Insulation Resistance (IR) / Effect - LEakage current
MLCC characteristics - Dissipation Factor (DF) / Effect - Self heating (∝ESR), Q-Factor
MLCC characteristics - Ripple current / Effect - Self heating (∝ESR)
MLCC characteristics - Operating Frequency / Effect - Impedance (Z) & ESR
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1. Capacitance change, TCC, Aging
Capacitance decreases in over time & high temp. conditions
2. TCC
TCC - / Cap. Change - / Temp. Range -
TCC - Y5V / Cap. Change - -82%~+22% / Temp. Range - -30℃~+85℃
TCC - X5R / Cap. Change - ±15% / Temp. Range - -55℃~+85℃
TCC - X7R / Cap. Change - ±15% / Temp. Range - -55℃~+125℃
3. Aging
Ct=C0(1-klog10t)
Ct = Capacitance value, t hours after the start of aging
C0 = Initial capacitance value, k=Aing constant, t=Aging time
※ Capacitance will recover its capacity while soldering
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1. Capacitance change, DC Bias & AC Voltage
Capacitance is changed by applied voltage conditions
4. DC Bias
Spontaneous Polarization of Dipole
※ Dipoles are aligned in the direction of the Electric field > Decrease the polarization change rate in the ac field
4. AC Voltage
Movement of Domain-Wall
※ Increase the applied AC voltage to the MLCC > Increase the polarization change rate in the AC field
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1. Capacitance change, Real example
Margin design is required to consider the characteristics
MLCC(X5R) ex) 3225m, 10uF, 50V, Tol. 10%
※ The above value is one of the sample data of general MLCCs
※ Please refer to the specific datasheet when you design
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2. Effect on a SET, Signal Line
Capacitance change should be considered when designing
[Low-pass filter (Noise suppression)]
Raw Siginal > LPF > High Capacitance OK, Low Capacitance Fail
[Using as a time constant]
Charging time for triggering
※ Using X5R/X7R is recommended for time constant circuit
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2. Effect on a SET, Power converter regulating
Lower capacitance leads bigger output voltage ripple
# Simulation conditions > Topology: Buck, Frequency: 3MHz, Vin: 4V, Vout: 1V, Duty ration = 25%
Capacitance - 1uF / Vout Ripple - 12mV
Capacitance - 3.2uF / Vout Ripple - 2.5mV
Capacitance - 10uF / Vout Ripple - 1.2mV
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2. Effect on a SET, Decoupling
It affects input voltage ripple, which can be a reason of malfunction
[Decoupling Circuit & Impedance]
[Decoupling Cap. Impedance(Z)]
Vac=Iac*Z
※ Voltage ripple is proportional to "Impedance of decoupling cap."
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